Confusion about CLE and ALE on the emif

[Troy Kisky]

James T Long wrote:
> Would someone please clear up the following for me?
> 
> The documentation for the the EMIF (srue20b) and the source code for 
> DVFlasher both say :
> 
>      To talk to NAND-Flashes:
> 
>      Tie A[2] to CLE and A[1] to ALE.  Apparently A[0] and BA[1:0] are not 
> connected.
> 
>      to set CLE low and ALE low, then use offset 00h
>      to set CLE high and ALE low, then use offset 10h
>      to set CLE low and ALE high, then use offset 0Bh
> 
> Why 0B?  If it's something to do with Endian-ess (to align the 
> command/address to the nand, perhaps), then 
> why not offsets (in order) 03h, 13h and 0Bh?
> 
> Obviously 0Bh is okay, since the code works, but I don't understand the 
> emphasis on '0B'.
> 

Its a typo, an 8 looks a lot like a B.