[PATCH 1/2 - v3] ARM: davinci - fix incorrect offsets and mask usage in psc code

m-karicheri2 at ti.com m-karicheri2 at ti.com
Fri Sep 23 16:26:12 CDT 2011


From: Murali Karicheri <m-karicheri2 at ti.com>

There are 5 LSB bits defined in PDSTAT and the code currently uses
a mask of 1 bit to check the status. Also there is PDSTAT and PDCTL
registers defined for domain0 and domain1 where as the code
always read the domain0 PDSTAT register and domain1 PDCTL register.
This patch fixes these issues.

Reviewed-by: Sergei Shtylyov <sshtylyov at mvista.com>

Signed-off-by: Murali Karicheri <m-karicheri2 at ti.com>
---
change from v2-v3
 - description of patch changed as per review comment
 - defined a constant for PDSTAT_STATE_MASK
This patch applies to the davinci-next branch of linux-davinci tree

 arch/arm/mach-davinci/include/mach/psc.h |    3 ++-
 arch/arm/mach-davinci/psc.c              |   18 +++++++++---------
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index a47e6f2..1724d95 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -233,7 +233,7 @@
 #define PTCMD		0x120
 #define PTSTAT		0x128
 #define PDSTAT		0x200
-#define PDCTL1		0x304
+#define PDCTL		0x300
 #define MDSTAT		0x800
 #define MDCTL		0xA00
 
@@ -244,6 +244,7 @@
 #define PSC_STATE_ENABLE	3
 
 #define MDSTAT_STATE_MASK 0x1f
+#define PDSTAT_STATE_MASK 0x1f
 
 #ifndef __ASSEMBLER__
 
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index a415804..5dbe974 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -50,7 +50,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
 		unsigned int id, u32 next_state)
 {
-	u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
+	u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
 	void __iomem *psc_base;
 	struct davinci_soc_info *soc_info = &davinci_soc_info;
 
@@ -67,11 +67,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
 	mdctl |= next_state;
 	__raw_writel(mdctl, psc_base + MDCTL + 4 * id);
 
-	pdstat = __raw_readl(psc_base + PDSTAT);
-	if ((pdstat & 0x00000001) == 0) {
-		pdctl1 = __raw_readl(psc_base + PDCTL1);
-		pdctl1 |= 0x1;
-		__raw_writel(pdctl1, psc_base + PDCTL1);
+	pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
+	if ((pdstat & PDSTAT_STATE_MASK) == 0) {
+		pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
+		pdctl |= 0x1;
+		__raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
 
 		ptcmd = 1 << domain;
 		__raw_writel(ptcmd, psc_base + PTCMD);
@@ -80,9 +80,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
 			epcpr = __raw_readl(psc_base + EPCPR);
 		} while ((((epcpr >> domain) & 1) == 0));
 
-		pdctl1 = __raw_readl(psc_base + PDCTL1);
-		pdctl1 |= 0x100;
-		__raw_writel(pdctl1, psc_base + PDCTL1);
+		pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
+		pdctl |= 0x100;
+		__raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
 	} else {
 		ptcmd = 1 << domain;
 		__raw_writel(ptcmd, psc_base + PTCMD);
-- 
1.7.0.4



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